Formally Correct Construction of Pipelined Processors
نویسندگان
چکیده
A method of formally correct synthesis is presented, and applied to the automatic construction of pipelined processors. The method is based on a repertoire of elementary correctness-preserving transformations which are e ciently cross-checked by an independent formal veri cation tool. Basic pipelining strategies as well as automatic post-synthesis veri cation are provided.
منابع مشابه
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تاریخ انتشار 1998